I worked on the drivers and firmware for a few ISDN cards back in 1997-1999. One of my performance optimizations for the BRI cards cut ping times from ~30ms to ~16ms. The Motorola MC68302's puny 68000 CPU took a long time to memcpy() packets from the buffer the HDLC controller would DMA them into back to the shared memory with the host. Eliminating that copy was more of an improvement than I expected.
The PRI (T1) cards using Intel i960 CPUs, which were quite nice embedded CPUs. The HDLC controller was capable of using individual 64k channels or bonding them together for fractional of full T1.
It was a bit late in the lifetime of ISDN, but I learned a heck of a lot about embedded systems from that job.
The PRI (T1) cards using Intel i960 CPUs, which were quite nice embedded CPUs. The HDLC controller was capable of using individual 64k channels or bonding them together for fractional of full T1.
It was a bit late in the lifetime of ISDN, but I learned a heck of a lot about embedded systems from that job.