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It actually sounds sort of difficult on those PIOs. All the timing stuff, start and stop bits, parity, flow control, ideally a FIFO, etc. You only have 32 words of instruction memory in each PIO. I wish they had made the PIOs more capable. It's not like they take a lot of die area compared to 264k of ram etc. The Beaglebone PRU's are closer to the right thing.


Presumably for any well-known protocol you'll be able to use a ready-made implementation. Which basically turns them into super-flexible IO modules.




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