There are many projects started some 10 years ago with Cyclone III FPGA and vendors do not want to scare the folks working with the same Quartus since then.
I wish I could simply synthesize my algorithms from C code instead writing that VHDL or Verilog code. SystemVerilog is a bit better, but the company does not allow using it.
Cyclone III was last supported in v13.1[1] of Quartus, which had a Nov-2013 release date[2]. Curiously, Figure 2 in this white paper[3] depicts all Cyclone models active as of March 2014, suggesting their tool went through significant refactoring with some big picture in mind, considering support for a largely active family wasn't continued. Not sure how much scaring folks away factored into their decision.
I wish I could simply synthesize my algorithms from C code instead writing that VHDL or Verilog code. SystemVerilog is a bit better, but the company does not allow using it.