Achronix is my favorite among the FPGA companies due to use of asynchronous logic. Got me doing research on the topic. Here are some of the first things I found:
I kept pushing both asynchronous and analog circuits for neural networks as they fit them better. I know one startup is doing mixed digital and analog for it. Not sure if asynch is getting much attention outside of memory. Anyway, readers jump on it as asynch should be easiest accelerator tech for VLSI ANN's.
Regardless, hope readers have fun with the links. :)
https://www.schneier.com/blog/archives/2015/07/friday_squid_...
Asynch design flow at 250nm http://async.usc.edu/pubs/MF_ASYNC04.pdf
65nm standard cell library for async http://www.inf.pucrs.br/~calazans/publications/2013_SIM_asce...
That one partly uses Null Convention Logic by Theseus http://www.theseusresearch.com/NullConventionLogic.htm
The very interesting AASP chip https://www.wikiwand.com/en/Asynchronous_array_of_simple_pro...
I kept pushing both asynchronous and analog circuits for neural networks as they fit them better. I know one startup is doing mixed digital and analog for it. Not sure if asynch is getting much attention outside of memory. Anyway, readers jump on it as asynch should be easiest accelerator tech for VLSI ANN's.
Regardless, hope readers have fun with the links. :)